1. Technical Field
The present invention relates to a silicon on insulator (SOI) wafer and manufacturing method same. Particularly, the present invention relates to a manufacturing method of an SOI wafer in which an SOI layer is formed on a transparent insulation substrate, and to the SOI wafer.
2. Description of the Related Art
An SOI wafer including an SOI (silicon on insulator) structure in which a silicon single crystal layer is formed on an insulator is suited for fabricating a semiconductor integrated circuit of a high density, and is expected to be applied to optical devices such as “TFT-LCD” (thin film transistor-liquid crystal display).
An SOI wafer in which an SOI layer is formed on a transparent silica substrate is used as such an optical device, for example. In this case, the substrate is a complete insulator, and so does not affect the mobility of the carrier within the SOI layer. Consequently, the mobility of the carrier in the SOI layer will be extremely high, thereby yielding a noticeable effect particularly when driven in high frequency. In addition, in such an SOI wafer, a driving circuit can be formed in an integral manner in the periphery of the TFT region, which enables high density mounting.
In such an SOI wafer for use as an optical device, the thickness of the SOI layer should be as thin as about 0.5 μm, for example. Accordingly, the bonding strength between the silica substrate and the SOI layer should be sufficiently strong and firm to endure grinding, polishing for making the SOI layer to be as thin as the level of the stated thickness, and to withstand the thermal and mechanical stresses exercised onto the SOI layer in manufacturing the device. To enhance the bonding strength, it has been required to perform thermal processing under a high temperature.
However, the thermal expansion coefficient differs between a silica substrate and an SOI layer. This occasionally causes stress due to thermal deformation during the thermal processing for bonding, during the cooling processing after the bonding, or during the grinding or polishing processing, thereby causing the silica substrate or the SOI layer to crack, or to break due to flaking. Such a problem is not confined to a case where the insulation transparent substrate is made of silica, and may equally happen when bonding a single crystal silicon wafer to a substrate having a different thermal expansion coefficient.
So as to solve the mentioned problem, a technology has been disclosed for alleviating the effect of thermal stress incident to thermal processing, by performing a thermal bonding processing process and a thin film process alternately and step by step, in an SOI wafer manufacturing method adopting a hydrogen ion injection peeling method (e.g., Patent Document No. 1: Japanese Patent Application Publication No. 11-145438).